Processing devices are vulnerable to security attacks including software attacks, invasive attacks by removing layers of packaging and different types of non-invasive attacks like fault injection and power analysis, etc. Attacks are also often categorized as in-wire when an attack does not require physical presence of an attacker. An example of such an attack is through the internet or other connection to another system. Non in-wire attackers would need typically to have access to the system.
This section mainly focuses on attacks that require considerable resources or Class III such as funded organizations with unlimited resources. Other lesser sophisticated attacks are similarly defended. A list of some of the available defense mechanisms is also described after the attack scenarios.
Attack Categories:
There are several sophisticated attack strategies reported. First, there are non-invasive side-channel attacks based on differential power analysis, electromagnetic analysis, and fault injection. Attacks based on power and electromagnetic analysis utilize the fact that encryption devices leak key data electromagnetically, whether by variation in power consumption or electromagnetic radiation. Differential power analysis (DPA) is very effective against cryptographic designs and password verification techniques. Electromagnetic analysis allows more focused observation of specific parts of a chip. Fault injection attacks typically require precise knowledge of the time instances when faults are injected and aim, e.g., at modifying memory bits to allow extraction of side-channel information. There are several reported successful side-channel attacks, e.g., recovery of password in Freescale MC908AZ60A, AES ASIC implementations, and smart cards.
Another attack category is based on invasive methods. Chips can be decapsulated front-side and/or rear-side manually using nitric acid and Acetone, or automatically using concentrated HNO3 and H2SO4. The more advanced approaches for reverse engineering have the capability to gather information about deep-submicron designs using Optical Imaging (OI), or Scanning Electron Microscopy (SEM). SEM yields higher-precision reverse engineering, often with sufficient detail for building gate-level models enabling VHDL simulation. SEM-based Voltage Contrast Microscopy is used to read memory cells.
Some attacks are based on recovering data from erased locations (e.g., caused by tamper-detection related zeroization logic) in SRAM and non-volatile memory due to data remanence—see successful attack on PIC16F84A. Other attacks are semi-invasive, e.g., UV or X-rays based, and can be completed without requiring removal of passivation layers.
Microprobing attacks would rely on removing the polymer layer from a chip surface, local removing of passivation layers, cutting through metal layers and using Focus Ion Beam (FIB) probes. FIB allows 10-nm precision to create probing points and/or restore security fuses. There are several companies specializing in chip reverse engineering, e.g., Chipworks and Semiconductor Insights at the time of submission of this patent.
Because microprocessors are vulnerable they cannot provide defense against sophisticated attackers. When added to systems such as an embedded device, mobile phone, or personal computer, the whole system's security is affected by the lack of a trusted component. In such systems an attacker has several ways to attack including by modifying and tampering with the software, attacking in memory, attacking the operating system, or physically attacking the processor itself. Existing solutions are not adequate whenever high security is necessary. This includes application such as premium content security, access to enterprise resources, devices used in power plats, defense systems, government systems etc.
Defenses:
State-of-the-art approaches offer limited defense against Class III attacks. Partial defense is provided by techniques including tamper detection with top metal layer sensors, operating voltage as well as temperature sensors, highly doped silicon substrate to defend against a rear-side attack, sophisticated security fuses including those in memory arrays, zeroization logic of security-sensitive state in case of tamper-detection, encryption of memory content with cryptographic accelerators, encryption of buses (typically with simple techniques to not affect latency), VTROM used instead of Mask ROM and Flash memory for non-volatile memory (not visible with static reverse engineering), and various defenses against memory remanence. There has been significant work on securing cryptographic implementations and software protection. These techniques are often software based an vulnerable to even simple attacks based on reverse engineering and running through debuggers. When they are microprocessor-assisted, they are vulnerable as microprocessors today to dot protect against sophisticated attackers.
Examples of micro-architectural techniques include memory architectures with protection like ARM Trust-Zone, randomized clock or various asynchronous designs, circuits based on process variation, etc.
The ever increasing sophistication of attacks implies that there is a considerable need to enhanced security during processing. Clearly, with a global trade of products and services it will be difficult to address security without establishing trust at the processing layer. No more can one rely on that just because a processing unit is completing a function in hardware it will be able to withstand attacks targeting extracting secret information, getting access to intellectual property, and gaining unauthorized access to system resources.